AVM16 - 16 channel VME 12 bit x 160 MHz ADC
AVM16 - 16 channel VME 12 bit x 160 MHz ADC
AVM16 (VME version) and AVX16 (VXS version) are 16 channel 12 bit flash ADC’s equipped with 5 FPGAs for data preprocessing.
The feature extraction FPGA modules allow to compute pulse integrals (also for overlapping pulses), measure and subtract pedestals, extrapolate pulse arrival times with 1.5 ns resolution, extract maxima and minima of the signal and disentangle pile up events in real time
Main features
- 16 channel 12bit/160MHz digitizer in VME,
- LEMO or flat cable input, +/- 1V default input voltage, baseline shift
- 10Hz - 100 MHz band width for DC coupled version, 200kHz – user limited band width for AC coupled version
- Event buffering, 4 buffers of 1024 samples (6.4us) for 16 channels
- VME Addressing modes: A24/D16, A24/D32, A32/D16, A32/D32, AD64, BLT, MBLT
- Internal or external clock
- Internal or external trigger
- 16 channel 12bit/160MHz digitizer in VME, works on VME/VME64, VME430 (except AVX16), VME64x and VXS crates
- LEMO or flat cable input, +/- 1V default input voltage range, baseline shift
- 10Hz - 100 MHz band width for DC coupled version, 200kHz – user limited band width for AC coupled version
- Buffer length: 4 buffers of 1024 samples (6.4us) for 16 channels
- VME Addressing modes: A24/D16, A24/D32, A32/D16, A32/D32, AD64, BLT, MBLT
- Clock: 160 MHz (internal) or front panel connector (external)
- Internal or external trigger
- Feature extraction: Amplitude, Integral (charge), Time of arrival, Multiple pulses (times, minima, maxima, partial charges), Zero-suppression
- Thresholds : Amplitude threshold common for all channels, Integral threshold individual for every channel
- Readout mode
- Limited verbosity (only charge and time for the main pulse)
- Extended verbosity (full set of extracted parameters)
- Raw data mode (plus extracted parameters)
Unfortunately this product has been discontinued. Please contact the factory for availability and more information.
|
Item |
Description |
|
AVM16-Base |
VME 16 channel 160MHz 12bit FADC with feature extraction, front panel without screening |
|
AVM16 |
VME 16 channel 160MHz 12bit FADC with feature extraction |
|
AVX16 |
VXS 16 channel 160MHz 12bit FADC with feature extraction |
|
Technical specifications |
|
|
Bus standards |
VME/VME64, VME64x, VXS (VXS version) |
|
No. of channels |
16 |
|
Input |
standard LEMO |
|
Sampling speed |
160 MHz |
|
Input voltage range |
+/- 1.000 V |
|
Bandwidth |
10 Hz..100 MHz (DC, full bandwidth option), 200 kHz..user limited (AC, limited bandwidth) |
|
Resolution |
12 bit or +/- 11 bit. Baseline setup. |
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Noise |
0.8 LSB (RMS) |
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Buffer length |
1024 samples (6.4 us), 4 buffers for 16 channe1s |
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Synchronization |
External front panel connector ECL/PECL/LVDS, dedicated VME pins |
|
Clock |
Internal clock 160 MHz, external front panel connector ECL/PECL/LVDS, dedicated VME pins |
|
Trigger options |
External front panel connector ECL/PECL/LVDS, internal self-triggering mode |
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Integration time window |
Relative to trigger time or to pulse arrival time |
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Time resolution |
1.6 ns (interpolated signal t0) |
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Self-Test |
Internal pulse generator with programmable amplitude |
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Configuration |
Remote via VME, local via JTAG connector |
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Addressing space |
256 locations (0..FF) |
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Base address |
00FF8000-00FFBF00 (32 locations) |
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Addressing mode |
A24/D16, A24/D32, A32/D16, A32/D32, AD64, BLT, MBLT |
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Power requirements |
VME/VME64 +5V/ 4A, VME64x/VXS +5V / 2A, +3.3V/2A |
